- Home
- Institut Néel
- Research teams
- Technical Groups & Services
- Work at the Institut
- Partnerships
Link visio: https://univ-grenoble-alpes-fr.zoom.us/j/99803654565?pwd=SlJhRlAzUGVSaFRqZ3dYK080ckpuZz09
Meeting ID: 998 0365 4565 / Passcode: 597211
The defence will be in English.
Abstract: Quantum physics spawned a new generation of technological innovation, thanks to the ability to control and measure matter at the single particle level. Using this to process information would realize the quantum computing paradigm shift, where classically intractable problems are promised to come at reach. Many candidates are currently racing for the best physical implementation of a quantum bit (or “qubit”), and all of them are facing the challenge to up-scale their architecture from a few lab qubits to an industrial quantum processor. Among these candidates, electrons trapped in silicon structures offer promising prospects, thanks to their reduced exposure to magnetic nuclei and spin-orbit interaction. Moreover, the expected compatibility of silicon structures with microelectronics industrial know-how gives hopes for scalability.
In the first part of this work, we demonstrate coherent manipulation of a single electron spin trapped in a CMOS FDSOI transistor with electrically driven spin resonance (EDSR). A micromagnet is patterned directly on top of the CMOS chip, creating an inhomogeneous magnetic gradient. Driving the electron motion inside this gradient with the already existing electric gates makes it feel an effective oscillating magnetic field, and thus enables single-qubit operations, with a relatively slow 1 MHz Rabi frequency and short 500 ns dephasing time. This limited performance is attributed to the combination of a finite number of two-level fluctuators and smaller quantum dot size compared to other silicon architectures. The shape of the Rabi decay and the amplitude of low-frequency noise are characteristic of hyperfine interaction with spinful nuclei. However, dynamically decoupling the electron spin from this frequency range showed state-of-the-art coherence times and performance limited by charge noise, in accordance with simple charge sensor measurements at low frequencies. These results point towards the relevance of silicon isotopic purification to avoid hyperfine-induced dephasing in CMOS-FDSOI transistors.
A second part of this thesis deals with readout noise. The objective was to demonstrate the use of a traveling-wave parametric amplifier (TWPA) in the amplification chain of radio-frequency reflectometry readout of CMOS devices. Patterning inductors on the CMOS chip reduced the parasitic capacitance of our resonators and enabled to perform lumped-element reflectometry in the 3-4 GHz range, closer to usual TWPA regimes. Even when being pumped far from its gap, the TWPA shows nominal figures of merit, enabling to get a 10 dB signal-to-noise ratio improvement on interdot charge transitions in CMOS FDSOI devices, and to multiplex interdot readout in a 6-gate device. This compatibility between large bandwidth superconducting amplifiers and multi-gate CMOS FDSOI quantum dot devices is promising towards electron spin qubit experiments at larger scale in this platform.
