Fermer le menu

Events

 

Pierre Hamonic presents

 

Gate-based readout of spin qubit and quantum dot arrays in silicon

 

Friday, January 23rd 2026 at 9:00 am

Seminar room – Building A – CNRS

The defence will be in English.

 

Abstract: The evolution of modern computing is closely tied to our ability to control matter at ever smaller length scales. After decades of miniaturization, transistors now operate at dimensions where quantum effects can no longer be neglected and instead impose fundamental limits on classical architectures.
These same effects, long regarded as constraints, are now exploited as a resource in the framework of quantum computing.
In particular, the confinement of single electrons in transistors enables the realization of spin qubits, which are distinguished by their robustness against environmental fluctuations and their compatibility with industrial microelectronic fabrication processes.
However, the transition toward practically useful quantum processors requires demonstrating both high performance at the level of the elementary qubit cell and the ability to extend these results to integrated and scalable architectures.
In a first part, we investigate a compact qubit cell, for which we demonstrate single-shot qubit readout, reliable initialization, and coherent two-spin operations. The device operates up to 1 K with low charge noise, paving the way for future integration with cryogenic electronics.
In a second part, we extend this approach to a 2×2 array of quantum dots fabricated in an industrial foundry. We demonstrate single-spin occupancy through controlled electron loading and gate-based reflectometry, enabling dispersive readout without external charge sensors. This strategy simplifies electrostatic control and represents a key step toward integrated and scalable multi-qubit architectures.